03 Jun ECET 105 Week 5 iLab Designing Adders and Subtractors NEW
The objectives are to reinforce the concepts of binary addition/subtraction while using the Quartus II Programmable Logic Tool as well as getting used to the program. We were also supposed to build and test a simple adder/subtractor using the eSOC III Board.
Observations/Measurements:
Describe any problems you had with this week’s assignment.
1. In the simulation run of the four-bit adder, when we performed the addition 5 + 3, we did not immediately have an output of 8 on SOUT. What could be the cause of this?
2. If we changed the count period to 1000 nS for A and B, would this correct the anomalies in Question 1? Why or why not?
3. How fast can your 4-bit adder/subtractor determine the sum or difference of two numbers?
4. Use the simulation timing diagram to compare the worst case time to do an operation with your adder/subtractor with the worst case using the 74LS283. State which operation takes the longest and list the time required for both devices.
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